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  ?1 ICX055AL e92832f66-st 1/3-inch ccd image sensor for ccir b/w camera description the ICX055AL is an interline ccd solid-state image sensor suitable for ccir 1/3-inch b/w video cameras. high sensitivity is achieved through the adoption of had (hole-accumulation diode) sensors. this chip features a field period readout system, and an electronic shutter with variable charge- storage time. features high sensitivity (+3db compare with icx045bla) and low dark current continuous variable-speed shutter 1/50s (typ.), 1/120s to 1/10000s low smear excellent antiblooming characteristics horizontal register: 5v drive reset gate: 5v drive device structure optical size: 1/3-inch format number of effective pixels: 500 (h) 582 (v) approx. 290k pixels number of total pixels: 537 (h) 597 (v) approx. 320k pixels interline ccd image sensor chip size: 6.00mm (h) 4.96mm (v) unit cell size: 9.8m (h) 6.3m (v) optical black: horizontal (h) direction: front 7 pixels, rear 30 pixels vertical (v) direction: front 14 pixels, rear 1 pixel number of dummy bits: horizontal 16 vertical 1 (even field only) substrate material: silicon sony reserves the right to change products and specifications without prior notice. this information does not convey any license by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustrating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. 16 pin dip (plastic) aaaaa a aaa a a aaa a aaaaa pin 1 v 7 30 1 14 pin 9 h optical black position (top view)
?2 ICX055AL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 note note) : photo sensor v out v ss v gg gnd v f 1 v f 2 v f 3 v f 4 v dd gnd sub v l rg nc h f 1 h f 2 horizontal register vertical register substrate voltage sub ?gnd v dd , v out , v ss ?gnd supply voltage v dd , v out , v ss ?sub v f 1 , v f 2 , v f 3 , v f 4 ?gnd vertical clock input voltage v f 1 , v f 2 , v f 3 , v f 4 ?sub voltage difference between vertical clock input pins voltage difference between horizontal clock input pins h f 1 , h f 2 ?v f 4 h f 1 , h f 2 , rg, v gg ?gnd h f 1 , h f 2 , rg, v gg ?sub v l ?sub v f 1 , v f 2 , v f 3 , v f 4 , v dd , v out ?v l rg ?v l v gg , vss, h f 1 , h f 2 ?v l storage temperature operating temperature pin no. symbol description pin no. symbol description 1 2 3 4 5 6 7 8 v f 4 v f 3 v f 2 v f 1 gnd v gg v ss v out vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock gnd output amplifier gate bias output amplifier source signal output 9 10 11 12 13 14 15 16 v dd gnd sub v l rg nc h f 1 h f 2 output amplifier drain supply gnd substrate (overflow drain) protective transistor bias reset gate clock horizontal register transfer clock horizontal register transfer clock pin description item ?.3 to +55 ?.3 to +18 ?5 to +10 ?5 to +20 to +10 to +15 to +17 ?7 to +17 ?0 to +15 ?5 to +10 ?5 to +0.3 ?.3 to +30 ?.3 to +24 ?.3 to +20 ?0 to +80 ?0 to +60 v v v v v v v v v v v v v v ? ? * 1 ratings unit remarks absolute maximum ratings * 1 +27v (max.) when clock width<10s, clock duty factor<0.1%. block diagram and pin configuration (top view)
?3 ICX055AL item v dd v gg v ss v sub d v sub v rgl d v rgl v l 14.55 1.75 9.0 ? 1.0 ? 15.0 2.0 * 2 15.45 2.25 18.5 +3 4.0 +3 v v v % v % ?% * 1 * 1 symbol min. typ. max. unit remarks bias conditions dc characteristics grounded with 680 resistor item output amplifier drain current input current input current i dd i in1 i in2 3 1 10 ma ? ? * 3 * 4 symbol min. typ. max. unit remarks output amplifier drain voltage output amplifier gate voltage output amplifier source substrate voltage adjustment range fluctuation range after substrate voltage adjustment reset gate clock voltage adjustment range fluctuation range after reset gate clock voltage adjustment protective transistor bias * 1 indications of substrate voltage (v sub ) ?reset gate clock voltage (v rgl ) setting value. the setting values of substrate voltage and reset gate clock voltage are indicated on the back of the image sensor by a special code. adjust substrate voltage (v sub ) and reset gate clock voltage (v rgl ) to the indicated voltage. fluctuation range after adjustment is 3%. v sub code one character indication v rgl code one character indication -- v rgl code v sub code code and optimal setting correspond to each other as follows. 1 v rgl code optimal setting 1.0 1.5 2.0 2.5 3.0 3.5 4.0 2 3 45 6 7 v sub code optimal setting 9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 16.5 17.0 17.5 18.0 efg hjkl m np q r s t uvwx y z ?l? ? v rgl = 3.0v v sub = 12.0v * 2 v l setting is the v vl voltage of the vertical transfer clock waveform. * 3 1) current to each pin when 18v is applied to v dd , v out , vss and sub pins, while pins that are not tested are grounded. 2) current to each pin when 20v is applied sequentially to v f 1 , v f 2 , v f 3 and v f 4 pins, while pins that are not tested are grounded. however, 20v is applied to sub pin. 3) current to each pin when 15v is applied sequentially to rg, h f 1 , h f 2 and v gg pins, while pins that are not tested are grounded. however, 15v is applied to sub pin. 4) current to v l pin when 30v is applied to v f 1 , v f 2 , v f 3 , v f 4 , v dd and v out pins or when, 24v is applied to rg pin or when, 20v is applied to v gg , vss, h f 1 and h f 2 pins, while v l pin is grounded. however, gnd and sub pins are left open. * 4 current to sub pin when 55v is applied to sub pin, while pins that are not tested are grounded. 18.5
?4 ICX055AL item readout clock voltage v vt v vh1 , v vh2 v vh3 , v vh4 v vl1 , v vl2 , v vl3 , v vl4 v f v |v vh1 ?v vh2 | v vh3 ?v vh v vh4 ?v vh v vhh v vhl v vlh v vll v f h v hl v f rg v rglh ? v rgll v f sub 14.55 ?.05 ?.2 ?.0 7.8 ?.25 ?.25 4.75 ?.05 4.5 22.5 15.0 0 0 ?.5 8.5 5.0 0 5.0 23.5 15.45 0.05 0.05 ?.0 9.05 0.1 0.1 0.1 0.5 0.5 0.5 0.5 5.25 0.05 5.5 0.8 24.5 v v v v v v v v v v v v v v v v v 1 2 2 2 2 2 2 2 2 2 2 2 3 3 4 4 5 v vh = (v vh1 + v vh2 ) /2 v vl = (v vl3 + v vl4 ) /2 v f v = v vh n ?v vl n (n = 1 to 4) high-level coupling high-level coupling low-level coupling low-level coupling * 1 low-level coupling horizontal transfer clock voltage reset gate clock voltage substrate clock voltage vertical transfer clock voltage symbol min. typ. max. unit waveform diagram remarks * 1 the reset gate clock voltage need not be adjusted when reset gate clock is driven when the specifications are as given below. in this case, the reset gate clock voltage setting indicated on the back of the image sensor has not significance. item reset gate clock voltage symbol v rgl v f rg ?.2 8.5 0 9.0 0.2 9.5 v v 4 4 min. typ. max. unit waveform diagram remarks clock voltage conditions
?5 ICX055AL clock equivalent circuit constant item capacitance between vertical transfer clock and gnd c f v1 , c f v3 c f v2 , c f v4 c f v12 , c f v34 c f v23 , c f v41 c f v13 c f v24 c f h1 , c f h2 c f hh c f rg c f sub r 1 , r 3 r 2 , r 4 r gnd r f h r f rg 1500 820 470 230 150 230 47 47 5 320 51 100 15 10 40 pf pf pf pf pf pf pf pf pf pf capacitance between vertical transfer clocks vertical transfer clock series resistor vertical transfer clock ground resistor horizontal transfer clock series resistor reset gate clock series resistor symbol min. typ. max. unit remarks r f h r f h h f 2 h f 1 c f h1 c f h2 c f hh v f 1 c f v12 v f 2 v f 4 v f 3 c f v34 c f v23 c f v41 c f v13 c f v24 c f v1 c f v2 c f v4 c f v3 r gnd r 4 r 1 r 3 r 2 vertical transfer clock equivalent circuit horizontal transfer clock equivalent circuit r f rg rg f c f rg reset gate clock equivalent circuit capacitance between horizontal transfer clock and gnd capacitance between horizontal transfer clocks capacitance between reset gate clock and gnd capacitance between substrate clock and gnd
?6 ICX055AL drive clock waveform conditions (1) readout clock waveform (2) vertical transfer clock waveform ii ii 100% 90% 10% 0% v vt tr twh tf f m 0v f m 2 v f 1 v f 3 v f 2 v f 4 v vhh v vh v vhl v vhh v vhl v vh1 v vl1 v vlh v vll v vl v vhh v vh3 v vhl v vh v vhh v vhl v vl3 v vl v vll v vlh v vhh v vhh v vh v vhl v vhl v vh2 v vlh v vl2 v vll v vl v vhh v vhh v vhl v vh4 v vhl v vh v vl v vlh v vll v vl4
?7 ICX055AL (3) horizontal transfer clock waveform tr twh tf 90% 10% twl v f h v hl (4) reset gate clock waveform point a twl v f rg v rgh v rgl + 0.5v v rgl 10% v rglh rg waveform v rgll h f 1 waveform twh tr tf v rglh is the maximum value and v rgll is the minimum value of the coupling waveform during the period from point a in the above diagram until the rising edge of rg. in addition, v rgl is the average value of v rglh and v rgll . v rgl = (v rglh + v rgll )/2 assuming v rgh is the minimum value during the interval twh, then: v f rg = v rgh ?v rgl
?8 ICX055AL (5) substrate clock waveform 90% 100% 10% 0% v sub tr twh tf f m f m 2 v f sub clock switching characteristics item readout clock vertical transfer clock horizontal transfer clock horizontal transfer clock horizontal transfer clock reset gate clock substrate clock v t v f 1 , v f 2 , v f 3 , v f 4 h f h f 1 h f 2 f rg f sub 2.3 37 11 1.5 2.5 41 5.6 15 2.0 38 75 42 5.6 79 0.5 12 0.012 0.012 6.5 15 0.5 0.015 * 2 0.5 10 0.012 0.012 4.5 0.25 15 0.5 ? ? ns ? ? ns ? during readout * 1 during imaging during parallel- serial conversion during drain charge symbol twh min. typ. max. min. typ. max. min. typ. max. min. typ. max. twl tr tf unit remarks * 1 when vertical transfer clock driver cxd1250 is used. * 2 tf 3 tr ?2ns
?9 ICX055AL zone definition of video signal shading 8 9 6 9 v 10 h 8 h 8 v 10 effective pixel region ignored region zone 0, i zone ii , ii ' 500 (h) 582 (v) image sensor characteristics (ta = 25?) item sensitivity saturation signal smear video signal shading dark signal dark signal shading flicker lag s vsat sm sh vdt ? vdt f lag 420 630 500 0.005 0.007 20 25 2 1 2 0.5 mv mv % % % mv mv % % 1 2 3 4 4 5 6 7 8 ta = 60? zone 0, i zone 0 to ii' ta = 60? ta = 60? symbol min. typ. max. unit measurement method remarks
?10 ICX055AL image sensor characteristics measurement method measurement conditions 1) in the following measurements, the substrate voltage and the reset gate clock voltage are set to the values indicated on the device, and the device drive conditions are at the typical values of the bias and clock voltage conditions. 2) in the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black (ob) level is used as the reference for the signal output, and the value measured at point [ * a] in the drive circuit example is used. definition of standard imaging conditions 1) standard imaging condition i : use a pattern box (luminance 706cd/m 2 , color temperature of 3200k halogen source) as a subject. (pattern for evaluation is not applicable.) use a testing standard lens with cm500s (t = 1.0mm) as an ir cut filter and image at f8. the luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. 2) standard imaging condition ii : image a light source (color temperature of 3200k) with a uniformity of brightness within 2% at all angles. use a testing standard lens with cm500s (t = 1.0mm) as an ir cut filter. the luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. sensitivity set to standard imaging condition i . after selecting the electronic shutter mode with a shutter speed of 1/250s, measure the signal output (vs) at the center of the screen and substitute the value into the following formula. s = vs [mv] 2. saturation signal set to standard imaging condition ii . after adjusting the luminous intensity to 10 times the intensity with average value of the signal output, 200mv, measure the minimum value of the signal output. 3. smear set to standard imaging condition ii . with the lens diaphragm at f5.6 to f8, adjust the luminous intensity to 500 times the intensity with average value of the signal output, 200mv. when the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective h blankings, measure the maximum value vsm [mv] of the signal output and substitute the value into the following formula. 4. video signal shading set to standard imaging condition ii . with the lens diaphragm at f5.6 to f8, adjust the luminous intensity so that the average value of the signal output is 200mv. then measure the maximum (vmax [mv]) and minimum (vmin [mv]) values of the signal output and substitute the values into the following formula. sh = (vmax ?vmin)/200 100 [%] 5. dark signal measure the average value of the signal output (vdt [mv]) with the device ambient temperature 60? and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 50 250 sm = 100 [%] (1/10v method conversion value) 200 vsm 500 1 1 10
?11 ICX055AL vlag (lag) signal output 200mv light fld sg1 strobe light timing output 6. dark signal shading after measuring 5, measure the maximum (vdmax [mv]) and minimum (vdmin [mv]) values of the dark signal output and substitute the values into the following formula. d vdt = vdmax ?vdmin [mv] 7. flicker set to standard imaging condition ii . adjust the luminous intensity so that the average value of the signal output is 200mv, and then measure the difference in the signal level between fields ( ? vf [mv]). then substitute the value into the following formula. f = ( ? vf/200) 100 [%] 8. lag adjust the signal output value generated by strobe light to 200mv. after setting the strobe light so that it strobes with the following timing, measure the residual signal (vlag). substitute the value into the following formula. lag = (vlag/200) 100 [%]
?12 ICX055AL 7 15v 5v xsub xv2 xv1 xsg1 xv3 xsg2 xv4 h f 2 h f 1 rg 10k 100k 10/16v 0.1 47k 2sa1175 0.01 ccd out ?.5v 3.3/16v 47/6.3v 680 100 3.9k 2sk523 180k 27k 1/6.3v 1m 1500p 0.01 3.3/20v 15k 47k 15k 0.1 39k 0.1 270k 2sc2785 3 27k 56k 0.1 100k 1/35v 1/35v 1/35v 10/20v 22/16v 22/20v 22 /10v cxd1250 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 123 45 6 8 16 15 14 13 12 11 10 9 icx055 (bottom view) h f 2 h f 1 nc rg v l sub gnd v dd v f 4 v f 3 v f 2 v f 1 gnd v gg v ss v out [ * a] drive circuit
?13 ICX055AL spectral sensitivity characteristics (includes lens characteristics, excludes light source characteristics) 900 800 700 600 500 wave length [nm] relative response 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.0 0.1 1000 400 sensor readout clock timing chart 2.0 2.5 1.5 1.2 0.3 38.5 2.5 unit: s v1 v2 v3 v4 odd field hd v1 v2 v3 v4 even field
?14 ICX055AL 135 1357 13 135 5 582 581 582 581 620 625 1 2 3 4 5 10 15 20 310 315 320 325 fld vd blk hd sg1 sg2 v1 v2 v3 v4 ccd out clp1 25 330 335 340 246 2468 24 246 6 8 7 drive timing chart (vertical sync)
?15 ICX055AL hd blk h1 h2 rg xshp xshd v1 v2 v3 v4 clp1 sub 490 495 500 1 2 3 5 10 15 20 25 30 1 2 3 5 10 15 16 1 2 3 5 7 1 2 3 5 drive timing chart (horizontal sync)
?16 ICX055AL notes on handling 1) static charge prevention ccd image sensors are easily damaged by static discharge. before handling be sure to take the following protective measures. a) either handle bare handed or use non-chargeable gloves, clothes or material. also use conductive shoes. b) when handling directly use an earth band. c) install a conductive mat on the floor or working table to prevent the generation of static electricity. d) ionized air is recommended for discharge when handling ccd image sensor. e) for the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) soldering a) make sure the package temperature does not exceed 80?. b) solder dipping in a mounting furnace causes damage to the glass and other defects. use a ground 30w soldering iron and solder each pin in less than 2 seconds. for repairs and remount, cool sufficiently. c) to dismount an image sensor, do not use a solder suction equipment. when using an electric desoldering tool, use a thermal controller of the zero cross on/off type and connect it to ground. 3) dust and dirt protection a) operate in clean environments (around class 1000 is appropriate). b) do not either touch glass plates by hand or have any object come in contact with glass surfaces. should dirt stick to a glass surface, blow it off with an air blower. (for dirt stuck through static electricity ionized air is recommended.) c) clean with a cotton bud and ethyl alcohol if the grease stained. be careful not to scratch the glass. d) keep in a case to protect from dust and dirt. to prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) when a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. do not reuse the tape. 4) do not expose to strong light (sun rays) for long periods. 5) exposure to high temperature or humidity will affect the characteristics. accordingly avoid storage or usage in such conditions. 6) ccd image sensors are precise optical equipment that should not be subject to mechanical shocks.
?17 ICX055AL package outline unit: mm package structure 0.3 16pin dip (450mil) h v 2.5 2.5 8.4 0.5 1.2 5.7 6.1 10.3 12.2 0.1 9.5 11.4 0.1 11.43 0.25 0?to 9 8 1 16 9 2-r0.5 2.5 11.6 9.2 2.5 1.2 3.35 0.15 3.1 1.27 3.5 0.3 0.46 0.3 1.27 0.69 (for the first pin only) 1. ? is the center of the effective image area. 2. the two points ? of the package are the horizontal reference. the point ?' of the package is the vertical reference. 3. the bottom ? of the package, and the top of the cover glass ? are the height reference. 4. the center of the effective image area relative to ? and ?' is (h, v) = (6.1, 5.7) 0.15mm. 5. the rotation angle of the effective image area relative to h and v is 1? 6. the height from the bottom ? to the effective image area is 1.41 0.10mm. the height from the top of the cover glass ? to the effective image area is 1.94 0.15mm. 7. the tilt of the effective image area relative to the bottom ? is less than 50m. the tilt of the effective image area relative to the top ? of the cover glass is less than 50m. 8. the thickness of the cover glass is 0.75mm, and the refractive index is 1.5. 9. the notches on the bottom of the package are used only for directional index, they must not be used for reference of fixing. c b a d m b' ~ ~ ~ package material lead treatment lead material package weight plastic gold plating 42 alloy 0.9g


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